The present invention relates to a T-gate electrode of a field effect transistor (an FET having a very small gate length from about 0.1 .mu.m to about 0.2 .mu.m, in particular) in a semiconductor device, and a method for fabricating the same.
In recent years, telecommunications technologies utilizing wireless communication have been tremendously developed and are still the object of vigorous research. Among other things, the application of high frequencies of 30 GHz or more on the millimeter wave bands to wireless LAN's, radar systems for preventing car crashes and the like is strongly demanded, because the frequency region has very abundant frequency resources yet to be cultivated.
In order to realize a super-high-frequency device operating in the millimeter wave band, the gate length of an FET should be shortened. Specifically, technology for forming a gate with a length from about 0.1 .mu.m to about 0.2 .mu.m is indispensable. Currently, such a gate is generally formed through electron beam (EB) exposure techniques. However, as the gate length is shortened, the resistance of the gate is increased correspondingly, which constitutes one factor of the decrease in gain and the deterioration of noise resistance characteristics in the high frequency bands. As a means for shortening the gate length and reducing the gate resistance at the same time, a so-called "T-gate structure" or "mushroom gate structure" is effectively used. The "T-gate" has a structure in which the lower portion in contact with a substrate is formed to have a much smaller size or cross-sectional area than that of the upper portion. The gate in such a shape is often used in high-frequency FETs.
(Prior Art Example 1)
Hereinafter, a conventional method for fabricating a semiconductor device having a T-gate electrode will be described with reference to the drawings. In this specification, the upper portion of a T-gate electrode, which is formed to have a relatively large size in order to reduce the resistance, will be called a "head portion". On the other hand, the lower portion thereof, which extends downward from the head portion and is formed to have a relatively small size in order to shorten the gate length, will be called a "leg portion".
FIGS. 8(a) through 8(d) and FIGS. 9(a) through 9(c) illustrate cross-sectional structures respectively corresponding to conventional process steps for forming a T-gate electrode through EB exposure technique using a multi-layer resist. In this example, a multi-layer resist, consisting of two layers of polymethyl methacrylate (PMMA) with respectively different sensitivities and being widely used as an EB resist, is employed.
First, as shown in FIG. 8(a), a lower resist film 102, made of PMMA having a high molecular weight and low sensitivity is applied onto a semiconductor substrate 101. Next, an upper resist film 103 made of PMMA having a low molecular weight and high sensitivity is applied thereon. Then, as shown in FIG. 8(b), a region 103a of the upper resist film 103, where the head portion of the gate electrode is to be formed (in this specification, such a region will be called a "head-forming region"), is subjected to the first EB exposure. And, as shown in FIG. 8(c), the upper resist film 103 is developed, thereby removing a part of the upper resist film 103 corresponding to the head-forming region 103a to form an opening 103b.
Next, as shown in FIG. 8(d), a region 102a of the lower resist film 102 where the leg portion of the gate electrode is to be formed (similarly, such a region will be called a "leg-forming region") is subjected to the second EB exposure. Then, as shown in FIG. 9(a), the lower resist film 102 is developed, thereby removing a part of the lower resist film 102 corresponding to the leg-forming region 102a to form an opening 102b. In this manner, a resist pattern for forming a T-gate electrode is obtained in the opening 103b of the upper resist film 103 and the opening 102b of the lower resist film 102.
Subsequently, as shown in FIG. 9(b), a metal film 104A is evaporated and deposited over the entire surface of the semiconductor substrate 101. And then the upper and lower resist films 103, 102 are lifted off, thereby making a T-gate electrode 104B out of the metal film 104A.
As described above, this structure uses the lower resist 102, made of PMMA having a high molecular weight, low sensitivity and high resolution, as the first layer and the upper resist 103, made of PMMA having a low molecular weight and high sensitivity, as the second layer. Thus, the T-gate electrode 104B can have a leg portion of the size on the order of sub-quarter microns and a head portion of a relatively large size, while suppressing the influence of the exposure radiation for the upper resist film 103 on the lower resist film 102.
In the first prior art example, the EB exposure needs to be performed twice. A method for forming a T-gate pattern by performing the EB exposure only once has also been proposed.
In addition, in another example, not the two-layered resist but a three-layered resist, in which an overhang can be formed easily, is used for further facilitating lifting off.
(Prior Art Example 2)
Hereinafter, another conventional method for fabricating a semiconductor device having a T-gate electrode will be described with reference to the drawings.
FIGS. 10(a) through 10(d) illustrate cross-sectional structures respectively corresponding to conventional process steps for forming a T-gate electrode through EB exposure technique using a single-layer resist. First, as shown in FIG. 10(a), an insulating film 106, made of SiO.sub.2, SiN or the like, is deposited over the entire surface of a semiconductor substrate 105. Then, a first resist film 107, made of PMMA, for example, is applied as a resist for EB exposure onto the insulating film 106. Thereafter, the upper surface of the gate-electrode-leg-forming region of the first resist film 107 is exposed to EB and then the first resist film 107 is developed. In this manner, part of the first resist film 107 corresponding to the leg-forming region is removed, thereby forming an opening 107a.
Next, the insulating film 106 is dry-etched using a gas such as CF.sub.4 gas and the first resist film 107 as a mask, thereby forming an opening 106a in the leg-forming region of the insulating film 106 as shown in FIG. 10(b). Thereafter, the first resist film 107 is removed, and a second resist film 108, which is sensitive to i-rays of ultraviolet light, is applied onto the entire surface of the semiconductor substrate 105 as shown in FIG. 10(c). Then, a gate-electrode-head-forming region of the second resist film 108 is patterned with i-rays and developed in a predetermined manner, thereby forming an opening 108a. In this way, a pattern for forming a T-gate electrode is obtained in the opening 108a of the second resist film 108 and the opening 106a of the insulating film 106.
Next, as shown in FIG. 10(d), a metal film is evaporated and deposited over the entire surface of the semiconductor substrate 105, and the second resist film 108 is lifted off, thereby making a T-gate electrode 109 out of the metal film.
However, the above-described conventional methods for forming a T-gate electrode have various problems to be described below.
First, in the first prior art example, the upper and lower resist films 103 and 102 are both subjected to EB exposure. Thus, during the first exposure for the upper resist film 103, the upper part of the lower resist film 102, which is in contact with the upper resist film 103, is also exposed to radiation to a small degree. As a result, the opening 102b of the lower resist film 102 is formed like a taper progressively expanding upward. Thus, the head and leg portions of the T-gate electrode 104 can be satisfactorily connected to each other. However, since the EB exposure needs to be performed twice, a currently available EB exposure system would have the throughput considerably decreased. In addition, the lower resist film 102 is unintentionally exposed to radiation partially during the exposure and development of the upper resist film 103, and the thickness of the lower resist film 102 is adversely decreased during the development. Thus, various controls should be performed to suppress these undesired phenomena.
Moreover, if the upper and lower resist films are simultaneously exposed to radiation during a single exposure process step, then the lower resist film is exposed through the upper resist film. Thus, in order to obtain an optimum T-structure, exposure patterns and development conditions should be determined so as to simultaneously obtain desired pattern shapes and sizes for the upper and lower resist films. Since such optimization is hard to realize, it is difficult to stably form a gate electrode in a desired T-shape.
On the other hand, in the second prior art example using a single-layer resist for EB exposure, the problems of the fabrication process using the two-layered resist film consisting of the upper and lower layers can be avoided. Thus, the second example is more advantageous in terms of the process throughput and the stability of the T-electrode. However, the opening 106a of the insulating film 106 for forming the leg portion and supporting the head portion has inner walls substantially vertical to the surface of the substrate 105. Thus, in filling in the openings 106a and 108a with the metal film for forming the gate electrode, the upper end of the opening 106a is more likely to be completely filled in with the metal film before the leg portion, being formed through the deposition of the metal film over the bottom of the opening 106a, reaches the upper end to be connected to the head portion being formed through the deposition of the metal film over the upper surface of the insulating film 106. Accordingly, such a process has a problem in that the head and leg portions of the T-gate electrode 109 cannot be connected to each other satisfactorily. In accordance with this process, it is difficult to form a T-gate electrode 109 having a gate length of about 0.1 .mu.m. In addition, the gate resistance is increased. Moreover, since the leg portion of the T-gate electrode is formed by filling in the opening 106a of the insulating film 106 with the metal film for forming the gate electrode, the gate capacitance adversely increases. This is because the insulating film 106 having a larger dielectric constant than that of the air exists around the leg portion of the T-gate electrode 109.
As described above, in the fabrication process using a multi-layer EB resist according to the first prior art example, though the leg portion of the T-gate electrode can be advantageously formed like a taper progressively expanding upward, the throughput and the stability of the T-gate electrode are adversely low. On the other hand, in the fabrication process using a single-layer EB resist according to the second prior art example, though the throughput is satisfactory, the leg portion of the T-gate electrode cannot be formed in a completely satisfactory taper shape, and the gate resistance and capacitance are both increased. That is to say, the first and second prior art examples have a "trade-off" relationship.